AD9361 → RVX3303EPB
Migration Guide

1. Overview & Compatibility Summary

The RVX3303EPB is a wideband RF transceiver designed as a functional replacement for the Analog Devices AD9361. Both devices cover 70MHz to 6GHz with 2T2R MIMO architecture, 12-bit ADC/DAC resolution, and 56MHz maximum instantaneous bandwidth.

2. Hardware / PCB Migration

2.1 Package & Footprint

Both devices use the CSP-BGA144 package (10mm × 10mm, 0.8mm ball pitch). No PCB layout changes are required if the existing land pattern meets IPC-7351 standards for this package.

• Verify solder mask opening matches the RVX3303EPB package drawing (provided with datasheet)
• Recommended reflow profile: same as standard lead-free BGA (peak 245°C)
• X-ray inspection recommended for first assembly run

2.2 RF Port Connectivity

TX1A, TX1B, TX2A, TX2B, RX1A, RX1B, RX2A, RX2B port assignments are pin-compatible. No RF trace rerouting required.

3. Power Supply Considerations

Supply rail voltages are identical. Power sequencing requirements are similar but verify the exact power-up ramp order in the RVX3303EPB datasheet before assuming a direct swap of the PMIC configuration.

• VDDA_1P3: 1.3V (PLL and analog core) — same
• VDDD_1P8: 1.8V (digital logic) — same
• VDD_2P5: 2.5V (I/O) — same
• Typical power consumption: comparable to AD9361 at equivalent bandwidth settings

4. SPI Interface & Register Differences

The SPI interface (4-wire, CPOL=0 CPHA=0, MSB first) is electrically identical. The register address map is partially compatible but not byte-for-byte identical.

Key register differences:

5. Firmware Initialization

The minimum initialization sequence follows the same conceptual flow as AD9361: reset → chip verify → clock setup → PLL config → RX/TX path enable. The specific register writes differ.

Example: Chip verification

// AD9361 — chip ID check
uint8_t id = spi_read(0x037);  // expect 0xA // RVX3303EPB — chip ID check
uint8_t id = spi_read(0x037);  // expect 0xB2 (see datasheet sec 4.1)

Initialization approach options:

• Option A (recommended): Use the RVX3303EPB initialization reference code provided in the migration package. Adapt to your MCU/FPGA SPI driver.
• Option B: Port existing AD9361 init code register-by-register using the cross-reference table. Suitable for teams with deep AD9361 knowledge.
• Option C: Contact Radivix for platform-specific support (Xilinx, Intel/Altera, custom FPGA).

6. GNU Radio / libiio Integration

If your design uses the AD9361 through the Linux IIO framework and GNU Radio's gr-iio source/sink, a RVX3303EPB compatible IIO driver and device tree overlay is available in the migration package.

• Driver kernel version: Linux 5.10+ tested
• GNU Radio version: 3.9 and 3.10 tested
• USRP B210 form factor adaptation: available on request

7. Expected Performance Delta

In most practical RF system applications, measured performance of RVX3303EPB is comparable to AD9361. Key metrics from our characterization:

• Phase noise: Within 2dBc/Hz of AD9361 at 1kHz offset at 2.4GHz LO
• Noise figure (RX): Comparable — full NF vs frequency plot in datasheet
• EVM (TX): <−35dBc at 20MHz IBW, LTE signal
• IIP3: Refer to datasheet Section 5 for detailed linearity characterization

Full application-level performance data (phase noise, EVM, spurious, NF vs frequency) is available in the RVX3303EPB datasheet. Request via the contact form below.

8. Migration Checklist

• ☐ Verify PCB land pattern against RVX3303EPB package drawing
• ☐ Check power sequencing against RVX3303EPB datasheet Table 3
• ☐ Obtain RVX3303EPB register map cross-reference from Radivix
• ☐ Update SPI initialization sequence using migration reference code
• ☐ Update chip ID check in firmware
• ☐ Update FIR coefficient loading if digital filtering is used
• ☐ Re-calibrate TX power and RX gain tables for your frequency bands
• ☐ Run lab characterization: EVM, phase noise, NF at key operating frequencies
• ☐ Update device tree / IIO driver if Linux-based (patch available from Radivix)